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| STG4158 Low voltage 0.6 typ single SPDT switch with break-before-make feature and 15 kV ESD protection Features Power-off and over-voltage protection Wide operating voltage range: VCC (opr) = 1.65 to 4.5 V Low ON resistance VIN = 0 V: - RON = 0.85 (max) at VCC = 4.5 V Latch-up performance exceeds 300 mA JESD 17 ESD performance tested on (D pin) - 8 kV IEC-61000-4-2 ESD, contact discharge - 15 kV IEC-61000-4-2 ESD, air discharge ESD performance test on all other pins - 3 kV Human-Body-Model - 200 V machine model (IEC61340-3-2 level M2) - 1000 V charge-device model (JESD22 C101) Flip-Chip6 Description The STG4158 is a high-speed CMOS low voltage single analog SPDT (single pole dual throw) switch or 2:1 multiplexer/ demultiplexer switch fabricated in silicon gate C2MOS technology. Designed to operate from 1.65 to 4.5 V, this device is ideal for portable applications. It offers low ON resistance (0.6 ) at VCC = 4.5 V ( typical TA = 25 C). The SEL input threshold is compatible to 1.8 V, and provides control to the switches. The switch S1 is ON (connected to common port D) when the SEL input is held high and OFF (high impedance state exists between the two ports) when SEL is held low. The switch S2 is ON (connected to common port D) when the SEL input is held low and OFF (high impedance state exists between the two ports) when SEL is held high. The SEL input has an integrated weak pull-down resistor to prevent SEL signal from floating. For low power consumption, the SEL input must be grounded. Power-off and over-voltage protection The STG4158 features power-off and overvoltage protection, enabling the device to be isolated during voltage fault events. Table 1. Device summary Order code STG4158BJR Package Flip-Chip6 Packing Tape and reel November 2007 Rev 1 1/21 www.st.com 21 Contents STG4158 Contents 1 2 3 4 5 6 7 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/ STG4158 Logic diagram 1 Logic diagram Figure 1. Functional diagram D S1 S2 SEL Figure 2. Input equivalent circuit D S2 S1 SEL R SEL CS22931 Table 2. Truth table SEL H L Switch S1 ON OFF(1) Switch S2 OFF(1) ON 1. High impedance 3/21 Logic diagram Figure 3. Pin connection (bump side view) STG4158 1 2 3 S1 GND S2 6 5 4 SEL D VCC Table 3. Pin description Symbol S1, S2 D SEL VCC GND Name and function Independent channels Common channel Control Positive supply voltage Ground (0V) Flip-Chip 1, 3 5 6 4 2 4/ STG4158 Maximum rating 2 Maximum rating Stressing the device above the rating listed in the "absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC VI VIC VO IIKC IIK IOK IO IOP Supply voltage DC input voltage DC control input voltage DC output voltage DC input diode current on control pin (VSEL < 0 V) DC input diode current (VSEL < 0V) DC output diode current DC output current DC output current peak (pulse at 1ms, 10% duty cycle) Absolute maximum ratings Parameter Value -0.5 to 5.5 -0.5 to VCC + 0.5 -0.5 to 5.5 -0.5 to VCC + 0.5 - 50 50 20 300 500 100 (1) Unit V V V V mA mA mA mA mA mA mW C C ICC or IGND DC VCC or ground current PD Tstg TL 1. Power dissipation at TA = 70C Storage temperature Lead temperature (10 sec) 500 -65 to 150 260 Derate above 70C by 18.5 mW/C Table 5. Symbol VCC VI VIC VO Top dt/dv Recommended operating conditions Parameter Supply voltage Input voltage Control input voltage Output voltage Operating temperature Input rise and fall time control input VCC = 1.65 to 2.7 V VCC = 3.0 to 4.5V Value 1.65 to 4.5 0 to VCC 0 to VCC 0 to VCC -40 to 85 0 to 20 ns/V 0 to 10 Unit V V V V C 5/21 Electrical characteristics STG4158 3 Electrical characteristics Table 6. DC specifications Value Symbol Parameter VCC (V) Test condition Min 1.65 - 1.95 VIH High level input voltage 2.25 - 2.7 3.0 - 4.3 4.5 1.65 - 1.95 VIL Low level input voltage 2.25 - 2.7 3.0 - 4.3 4.5 1.65 - 2.20 RON ON resistance ON resistance match between channels (1) ON resistance flatness (2) SEL pulldown resistance Sn OFF state leakage current Sn ON state leakage current 2.25 - 3.6 3.7 - 4.5 1.65 - 2.20 2.25 - 3.6 3.7 - 4.5 1.65 - 2.20 2.25 - 3.6 3.7 - 4.5 1.65 - 4.5 VS = 0, VD = VCC VS = VCC, VD = 0 VS = 0 to VCC VD = open VS = 0 V to VCC IS = 100 mA VS = 0 V to VCC IS = 100 mA VS = 0 V to VCC IS = 100 mA 2.0 0.9 0.6 40 10 10 1.2 0.3 0.2 5000 0.6 0.4 k 0.9 0.9 1.0 1.1 0.6 0.6 0.7 0.7 TA = 25 C Typ Max -40 to 85 C Unit Min 0.9 0.9 V 1.0 1.1 0.6 0.6 V 0.7 0.7 3.0 1.3 0.85 400 100 100 m Max RON RFLAT RSEL IOFF 1.65 - 4.5 -30 30 -300 300 nA ION 1.65 - 4.5 -20 20 -200 200 nA 6/ STG4158 Table 6. DC specifications (continued) Electrical characteristics Value Symbol Parameter VCC (V) Test condition Min 1.65 - 4.5 ID D ON state leakage current Floating 0 - 0.5 VCC > 0.5 1.65 - 4.5 IS S ON state leakage current Floating 0 - 0.5 Vcc > 0.5 Quiescent supply current 2.5 4.5 1.65 - 4.5 1.65 - 4.5 ISEL SEL leakage current Quiescent supply current low voltage driving 2.5 4.5 VSEL = VCC VSEL = GND VSEL = GND VSEL = VCC VSEL = VCC VS = open VD = 0 to VCC VD = 0 - 4.5 VD = 0 - 4.5 VD > VCC + 0.4 VS = 0 to VCC VD = open VS = 0 - 4.5 VS = 0 - 4.5 VS > VCC + 0.4 -30 5 5 5 5.6 9 0.05 0.1 0.5 1.0 -30 10 10 10 30 -300 TA = 25 C Typ Max 30 -40 to 85 C Unit Min -300 Max 300 25 25 25 300 15 15 15 10 20 0.1 1.0 1.0 2.0 nA A A A nA A A A A A A A A A ICC ICCLV 4.5 VSEL = 1.45 V 8 20 A 7/21 Electrical characteristics Table 7. AC electrical characteristics (CL = 35 pF, RL = 50 tr = tf 5 ns) , Value Symbol Parameter VCC (V) Test condition Min 1.65 - 1.95 tPLH, tPHL Propagation delay 2.25 - 2.7 3.0 - 3.6 3.7 - 4.5 1.65 - 1.95 TA = 25 C Typ 0.13 0.15 0.16 0.16 112 64 43 28 14 13 13 13 10 10 5 5 86 56 31 25 70 140 190 230 Max STG4158 -40 to 85 C Min Max Unit ns 160 86 58 38 20 18 18 18 ns ns tON Turn on time VS = VCC 2.25 - 2.7 R = 50 L 3.0 - 3.6 CL = 30 pF 3.7 - 4.5 1.65 - 1.95 tOFF Turn off time VS = VCC 2.25 - 2.7 R = 50 L 3.0 - 3.6 CL = 30 pF 3.7 - 4.5 1.65 - 1.95 tD Break-beforemake time delay CL = 35 pF 2.25 - 2.7 R = 50 L 3.0 - 3.6 VS = VCC/2 3.7 - 4.5 1.65 - 1.95 ns Q Charge injection 2.25 - 2.7 CL = 1 nF VGEN = 0 V 3.0 - 3.6 3.7 - -4.5 pC 8/ STG4158 Table 8. Electrical characteristics Analog switch characteristics (CL = 5 pF, RL = 50 TA = 25 C) , Value Symbol Parameter VCC (V) Test condition Min VS = 1 VRMS f = 100 kHz OIRR Off isolation (1) 1.65 - 4.5 VS = 1 VRMS f = 1 MHz VS = 1 VRMS f = 5 MHz VS = 1 VRMS f = 100 kHz Xtalk Crosstalk 1.65 - 4.5 VS = 1 VRMS f = 1 MHz VS = 1 VRMS f = 5 MHz RL = 600 CL = 50 pF 2.3 - 4.5 VS = VCC VPP f = 600 Hz to 20 kHz TA = 25 C Typ -76 -55 -40 -81 -61 -48 dB dB Max -40 to 85 C Min Max Unit THD Total harmonic distortion 0.015 % BW -3dB bandwidth 1.65 - 4.5 RL = 50 (switch ON) Control pin input capacitance Sn port capacitance D port capacitance when switch is enabled 1.8 - 4.5 VL = VCC 40 MHz CSEL 30 CSn 1.8 - 4.5 VL = VCC 80 pF CD 1.8 - 4.5 VL = VCC 190 1. OFF-isolation = 20 log10 (VD/VS), VD = output, VS = input to off switch 9/21 Application information STG4158 4 Application information Power-off and over-voltage protection The STG4158 has two operation modes: 1. 2. Normal operation mode Isolation mode In the normal operation mode, the switch functions as a normal SPDT, with the SEL pin that selects the switch to be either ON or OFF. Either S1 or S2 is connected to common channel D. In the isolation mode, all the switches are OFF. S1 or S2 are isolated from common channel D. The S1, S2, D ports have a 1 M impedence to ground. The operation modes are made possible by special detection circuitry that detects the voltage level at D, S1 and S2 supplies. Depending on these voltage levels, the device goes into isolation mode or normal operation mode accordingly. The isolation mode is a feature of the device that is useful during fault conditions that occur in the application environment. Table 9. VCC Voltage conditions VD,S (voltage at common port D, S1 or S2) Voltage condition All switches OFF S1,S2 and D are isolated from each other All switches OFF S1, S2, D are isolated from each other All switches OFF S1,S2 and D are isolated from each other Either S1 or S2 is connected to D, depending on SEL input Mode Floating 0 - 0.5 V VCC > 0.5 1.65 - 4.5 V 0 - 4.5 V 0 - 4.5 V VD,S > VCC + 0.4 0 - VCC Isolation Isolation Isolation Normal 10/ STG4158 Figure 4. Voltage conditions Application information The SEL input has an integrated weak pull-down resistor RSEL to prevent SEL signal from floating. For lower power consumption, the SEL input must be grounded. 11/21 Test circuits STG4158 5 Test circuits Figure 5. ON resistance I DS V V CC S1 D VS S2 IN GND GND CS14071 Figure 6. Bandwidth V CC D S1 V OUT S2 V IN CC GND CS00371 12/ STG4158 Figure 7. OFF leakage Test circuits V CC I S(OFF) D I D(OFF) A V SS A V D S2 IN V CC GND CS14081 Figure 8. Channel-to-channel crosstalk CS14091 13/21 Test circuits Figure 9. OFF isolation V CC STG4158 S1 50 V OUT S2 IN GND VS GND CS00381 Figure 10. Test circuit 1. CL = 5/35 pF or equivalent: (includes jig capacitance) 2. RL = 50 or equivalent 3. RT = ZOUT of pulse generator (typically 50 ) 14/ STG4158 Figure 11. Break-before-make time delay Test circuits Figure 12. Switching time and charge injection , , (VGEN = 0 V, RGEN = 0 RL = 1 M CL = 100 pF) Figure 13. Turn ON, turn OFF delay time 15/21 Package mechanical data STG4158 6 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 14. Flip-Chip6 package outline f E1 e A B 1 A1 see note 1 Bottom view 2 3 D1 D Top view 7504896_J C A1 e b f ccc C E 1. The terminal pin 1 on the bumps side is identified by a distinguishing feature (for instance by a circular "clear area" - typically 0.1mm diameter). The terminal pin 1 on the backside of the product is identified by a distinguishing feature (for instance by a circular "dot" - typically 0.5 mm diameter). 2. Drawing not to scale. 16/ A2 A STG4158 Table 10. Flip-Chip6 mechanical data millimeters Symbol Min A A1 A2 b D D1 E E1 e f ccc 0.545 0.17 0.375 0.23 0.813 0.39 1.213 0.79 0.36 0.204 Typ 0.6 0.2 0.4 0.255 0.828 0.4 1.228 0.8 0.4 0.214 0.05 Package mechanical data Max 0.655 0.23 0.425 0.28 0.843 0.41 1.243 0.81 0.44 0.224 Figure 15. Footprint recommendation 0.80 0.40 B A 1 Grid placement area 2 3 0.40 0.22 158 Figure 16. Flip-Chip6 marking 17/21 Package mechanical data Figure 17. Flip-Chip6 tape specification Dot identifying Pin 1 location 4 +/- 0.1 O 1.5 +/- 0.1 STG4158 1.75 +/- 0.1 3.5 +/- 0.05 0.75 +/- 0.05 4 +/- 0.1 All dimensions in mm 8 + 0.30 - 0.10 1.32 + 0.05 158 158 158 0.92 +/- 0.05 User direction of unreeling 18/ STG4158 Figure 18. Flip-Chip6 reel information) Package mechanical data 0068697_I 19/21 Revision history STG4158 7 Revision history Table 11. Date 12-Nov-2007 Document revision history Revision 1 Initial release. Changes 20/ STG4158 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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